According to the latest announcement from the organization responsible for the standard, the PCI-Express interconnection standard is likely to undergo some major changes in the coming years.

PCI-SIG announced this morning the formation of the PCIe Optics Working Group, whose mandate is to focus on implementing PCIe through optical interfaces. The press release also notes that the PCI-SIG Optical Working Group aims to be optical technology-independent and support a broad range of optical technologies, while making it possible to develop technology-specific form factors.

Nathan Brookwood, Insight 64 researcher, said: "Optical connections will be an important advancement for PCIe architectures as they will enable higher performance, lower power consumption, longer coverage and lower latency. Many data-hungry markets and applications, such as cloud and quantum computing, hyperscale data centers, and high-performance computing, will benefit from a PCIe architecture that enables optical connectivity."

Al Yanes, President and Chairman of PCI-SIG, said, "We are seeing strong industry interest in expanding the reach of established multi-generation, energy-efficient PCIe technology standards by enabling optical connectivity between applications." "PCI-SIG welcomes input from the industry and invites all PCI-SIG members to join the Optics Working Group to share their expertise and help develop specific working group goals and requirements."

Designed to replace copper interconnect?

Although the organization is still in its early stages, the impact of traditional copper-binding standards could be significant, as the optical technology will bypass some of the increasingly stubborn restrictions on copper signal transmission that traditional PCIe will soon approach, according to anandtech.

First released in 2000, PCI-Express was originally developed around the use of high-density edge connectors and is still in use today. The PCIe Card Electromechanical Specification (CEM) defines the PCIe add-on card form factors used over the past two decades, ranging from x1 to x16 connections.

While the PCIe CEM has seen little change over the years (largely to ensure backward and forward compatibility), the signal standard itself has undergone several speed upgrades. Including the latest PCIe 6.0 standard, the speed of a single PCIe lane has increased 32 times since 2000, and PCI-SIG will double this speed again with PCIe 7.0 in 2025. Due to the large increase in the amount of data transferred per pin, the actual frequency bandwidth used by the standard has increased by a similar degree, with PCIe 7.0 set to operate at a frequency closer to 32GHz.

In developing the updated PCIe standard, PCI-SIG has worked to minimize these issues, such as by adopting alternative means of signaling that do not require higher frequencies (such as PCIe 6 with PAM-4), and by using a mid-course retimer that helps keep up with the higher frequencies used by the standard as materials improve. But the frequency limits of copper wiring within PCBS have never been completely eliminated, which is why in recent years PCI-SIG has developed an official standard for PCI-cabling based on copper.

The PCIe 5.0/6.0 cabling standard, which is still in the works at the end of the year, offers the option of using copper cables to transfer PCIe within the system (internal) and between systems (external). In particular, relatively thick copper cables have less signal loss than PCB wiring, overcoming the direct disadvantage of high-frequency communication, that is, short channel coverage (that is, short signal propagation distance). While the wiring standard is intended as a replacement for PCIe CEM connectors, rather than a large-scale replacement, its existence highlights the problems faced by copper cables for high-frequency signal transmission, which will only become more challenging once PCIe 7.0 is complete.